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Automatic generation of correct minimal clocking constraints for a semiconductor product

机译:自动为半导体产品生成正确的最小时钟约束

摘要

A electronic design automation tool, apparatus, method, and program product by which design requirements for an intended semiconductor product and the resource definitions of a semiconductor platform are input. From the design requirements and the resource definitions, parameters specific to clocking are derived, e.g., clock property information, clock domain crossing information, and clock relationship specification. The tool and method embodied therein validates the clocking parameters of the design requirements with the resource definitions and invokes errors if the parameters are not realizable. Once the desired clocking parameters are consistent with the actual clocking parameters, correct physical optimization constraints and timing constraints are generated for the clocks. An iterative process can achieve correct and minimal clocking constraints.
机译:一种电子设计自动化工具,设备,方法和程序产品,通过该产品,可以输入预期的半导体产品的设计要求和半导体平台的资源定义。根据设计要求和资源定义,导出特定于时钟的参数,例如时钟属性信息,时钟域交叉信息和时钟关系规范。其中包含的工具和方法使用资源定义来验证设计需求的时钟参数,如果参数无法实现,则会调用错误。一旦所需的时钟参数与实际时钟参数一致,就为时钟生成正确的物理优化约束和时序约束。迭代过程可以实现正确且最小的时钟约束。

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