Layout area efficient, high speed, dynamic multi-input exclusive or (XOR) and exclusive NOR (XNOR) logic gate circuit designs for integrated circuit devices

摘要

A layout area efficient, high speed, dynamic multi-input exclusive OR (XOR) and exclusive NOR (XNOR) logic gate circuit design of especial utility with respect to integrated circuit devices. The logic gate design disclosed herein utilizes fewer transistors than traditional static designs and, therefore, requires a smaller amount of integrated circuit layout area while nevertheless affording higher speed operating performance than that exhibited in existing conventional circuits.