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Data output clock generating circuit and method of generating data output clock of semiconductor memory apparatus
Data output clock generating circuit and method of generating data output clock of semiconductor memory apparatus
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机译：数据输出时钟产生电路和产生半导体存储装置的数据输出时钟的方法
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摘要
A data output clock generating circuit for a semiconductor memory apparatus includes a rising data output clock generating unit which combines a rising clock with a signal to be generated in response to a rising output enable signal and a falling clock to generate a rising data output clock, and a falling data output clock generating unit which combines the falling clock with a signal to be generated in response to a falling output enable signal and the rising clock to generate a falling data output clock.
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