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System and method for controlling simulation of hardware in a hardware development process

机译:在硬件开发过程中控制硬件仿真的系统和方法

摘要

A system and method for simulating a digital circuit uses scheduling information for Term Rewriting System (TRS) rules to limit the computation of simulation values to only those value used by the rules scheduled to execute on the current state of the system. Typically only a small subset of TRS rules are scheduled to execute on any given state, thus only values related to this subset are computed. Such a determination may be made by leveraging the logical separation of rule activations and rule actions in a TRS system, such that only rule activation information need be examined.
机译:用于模拟数字电路的系统和方法使用用于术语重写系统(TRS)规则的调度信息来将模拟值的计算限制为仅被调度为在系统的当前状态下执行的规则所使用的那些值。通常,仅安排一小部分TRS规则在任何给定状态下执行,因此仅计算与该子集相关的值。可以通过利用TRS系统中规则激活和规则动作的逻辑分离来做出这样的确定,使得仅需要检查规则激活信息。

著录项

  • 公开/公告号US7370312B1

    专利类型

  • 公开/公告日2008-05-06

    原文格式PDF

  • 申请/专利权人 GEOFFREY W. E. STECKEL;

    申请/专利号US20050047281

  • 发明设计人 GEOFFREY W. E. STECKEL;

    申请日2005-01-31

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 20:09:07

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