a thin film transistor array panel having a means for visual inspection and a method of visual test

摘要

Data defining the display area and the plurality of the display area by gate lines and intersect the gate line on an insulating substrate made of the surrounding area lines are formed. The peripheral region is inserted into the gate driving circuit that is connected to the gate line and between the gate drive circuit and the gate line, and is formed with a logic circuit for VI that has a plurality of first to third NOR (NOR) gate. Wherein the first input terminal of the first NOR gate of a logic circuit for VI is connected to the output terminal of the gate drive circuit and the second input is connected to CON1 terminal and an output terminal is connected to the second or the first input terminal of the third NOR gate and, a second input terminal of the NOR gate is connected to CON2 terminal output stage and connected lines and odd gate, third second input terminal of the NOR gate is connected to the CON3 terminal and an output terminal is connected to lines and even-numbered gate have. ; A thin film transistor substrate, VI logic circuit, a gate driving circuit, the transmission gate