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A method for the production of an integrated memory device with a buried bit lines and an integrated memory device with a buried bit lines

机译:一种用于制造具有掩埋位线的集成存储设备和具有掩埋位线的集成存储设备的方法

摘要

A method for the production of an integrated memory device (100), wherein said method comprising the steps of:a) depositing a first dielectric layer (2) on a substrate (1), which has a substrate surface (1a),b) depositing a first gate - conductor layer (6), as a result of which a first layer stack (9) is formed, which at least the first dielectric layer (2) and the first gate - conductor layer (6) comprises,c) patterning of the first layer stack (9), as a result of which a plurality of structured conductor tracks (10) is created, which along a first direction (x) parallel to the substrate surface (1a) and extend along a second direction (y), the of the first direction (x) is different, by means of elongated intermediate spaces (15) are separated from each other,d) forming a plurality of bit lines (20),e) forming an insulating layer (21), which covers the bit lines (20),f) depositing a second layer stack (29) andg) patterning of the second layer stack (29), as a result of which a plurality of word lines (30) is formed along the..
机译:一种用于制造集成存储器件(100)的方法,其中,所述方法包括以下步骤:a)在具有衬底表面(1a)的衬底(1)上沉积第一介电层(2),b)沉积第一栅极-导体层(6),从而形成第一叠层(9),至少第一介电层(2)和第一栅极-导体层(6)包括,c)对第一叠层(9)进行构图,结果是创建了多个结构化的导体迹线(10),它们沿着平行于基板表面(1a)的第一方向(x)并沿着第二方向( y),第一方向(x)的方向不同,借助于细长的中间空间(15)彼此分开,d)形成多条位线(20),e)形成绝缘层(21) ,其覆盖位线(20),f)沉积第二层堆叠(29),以及g)第二层堆叠(29)的图案化,结果多个字线(30)的长度沿该线形成。

著录项

  • 公开/公告号DE102006019122B4

    专利类型

  • 公开/公告日2008-03-06

    原文格式PDF

  • 申请/专利权人

    申请/专利号DE20061019122

  • 发明设计人

    申请日2006-04-25

  • 分类号H01L21/8247;H01L27/115;

  • 国家 DE

  • 入库时间 2022-08-21 19:50:01

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