首页> 外国专利> Method for simulation of circuit, involves simulating reference basic circuits and scaling simulation results of preceding steps in circuit, where step of scaling of reference basic circuits has scaling of channel width of transistors

Method for simulation of circuit, involves simulating reference basic circuits and scaling simulation results of preceding steps in circuit, where step of scaling of reference basic circuits has scaling of channel width of transistors

机译:电路仿真的方法,包括仿真参考基本电路和缩放电路中先前步骤的仿真结果,其中参考基本电路的缩放步骤具有晶体管的沟道宽度的缩放

摘要

The method involves simulating a given number of reference basic circuits and scaling the simulation results of the preceding steps in the circuit. The step of scaling of the reference basic circuits has a scaling of a channel width of the transistors in the reference basic circuits. The reference basic circuits have two different circuits for a n-channel metal oxide semiconductor-Transistor and a p-channel metal oxide semiconductor-Transistor. The step of scaling of the simulation results is implemented in consideration of switching status of a transistor of the circuit. Independent claims are also included for the following: (1) a storage medium, on which a program is stored for implementing the method (2) an electronic data processing system, on which a program is stored for implementing the method.
机译:该方法包括模拟给定数量的参考基本电路,并缩放电路中先前步骤的模拟结果。基准基本电路的缩放步骤具有基准基本电路中的晶体管的沟道宽度的缩放。参考基本电路具有用于n沟道金属氧化物半导体晶体管和p沟道金属氧化物半导体晶体管的两个不同的电路。考虑到电路的晶体管的开关状态来实现模拟结果的缩放步骤。还包括以下方面的独立权利要求:(1)一种存储介质,在其上存储用于实施该方法的程序。(2)电子数据处理系统,在其上存储用于实施该方法的程序。

著录项

  • 公开/公告号DE102006043805A1

    专利类型

  • 公开/公告日2008-03-27

    原文格式PDF

  • 申请/专利权人 OFFIS E.V.;

    申请/专利号DE20061043805

  • 发明设计人 HELMS DOMENIK;

    申请日2006-09-13

  • 分类号G06F17/50;

  • 国家 DE

  • 入库时间 2022-08-21 19:49:44

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