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TEST QUALITY EVALUATION DEVICE OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND TEST QUALITY EVALUATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT

机译:半导体集成电路的测试质量评估装置以及半导体集成电路的测试质量评估方法

摘要

PROBLEM TO BE SOLVED: To provide a test quality evaluation device of a semiconductor integrated circuit for achieving improvement of test quality.;SOLUTION: The test quality evaluation device 100 of the semiconductor integrated circuit includes: a failure-layout information link part for preparing a weighing failure dictionary by allowing a layout element relating to non-detection failure to correspond to the non-detection failure not detected by a test pattern as weighing of the non-detection failure; a test quality index calculating part for outputting an obtained product as an inferiority remaining rate due to the test pattern by multiplying weighing of the non-detection failure, an inferior mode-failure model corresponding factor, and an inferiority generation rate of a layout element unit; a determining part for determining whether the inferiority remaining rate is a target value or less; and a test point insertion part for inserting a test point for preferentially detecting the non-detection failure of large weighing in a logic net of a test object circuit based on the weighing failure dictionary when the inferiority remaining rate is determined to be higher than the target value with the determination part.;COPYRIGHT: (C)2009,JPO&INPIT
机译:解决的问题:提供一种用于提高测试质量的半导体集成电路的测试质量评估设备。解决方案:半导体集成电路的测试质量评估设备100包括:故障布局信息链接部分,用于准备测试模块。通过允许与非检测故障有关的布局元素对应于测试图案未检测到的非检测故障作为对非检测故障的加权,来对故障字典进行加权;测试质量指标计算部分,用于通过将未检测故障的权重,劣质模式-失效模型对应因子和布局元素单元的劣质发生率相乘,将获得的产品作为基于测试图案的劣质残留率输出;确定部分,用于确定所述劣等残存率是否为目标值或更低;测试点插入部分,用于在确定劣质剩余率高于目标值时,基于称重故障字典,在测试对象电路的逻辑网中插入用于优先检测大称量的未检测到故障的测试点。值与确定部分。;版权:(C)2009,JPO&INPIT

著录项

  • 公开/公告号JP2009192407A

    专利类型

  • 公开/公告日2009-08-27

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP20080034372

  • 发明设计人 NOTSUYAMA YASUYUKI;

    申请日2008-02-15

  • 分类号G01R31/28;

  • 国家 JP

  • 入库时间 2022-08-21 19:45:42

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