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SIMULATION DEVICE, CONVERSION APPARATUS, ASYNCHRONOUS CIRCUIT, AND INTEGRATED CIRCUIT

机译:仿真设备,转换装置,异步电路和集成电路

摘要

PPROBLEM TO BE SOLVED: To provide asynchronous circuit design tools for those engineers who are versed in standard hardware description languages (HDLs), which is widely used in industry mainly for synchronous circuit design, to design asynchronous circuits with relative ease. PSOLUTION: The asynchronous circuit design tools include a translator provided with a transformation means for transforming a code written in an asynchronous circuit design language, which is based on a standard HDL and includes minimal primitives for allowing the communications between asynchronous processes, into a code written in a standard HDL, which is for synchronous circuit design. The codes transformed into the standard HDL can be functionally verified by using commercially available simulators, which are originally developed for verifying synchronous circuit design. PCOPYRIGHT: (C)2009,JPO&INPIT
机译:

要解决的问题:为那些精通标准硬件描述语言(HDLs)的工程师提供异步电路设计工具,该工具在工业中主要用于同步电路设计,被广泛使用,以相对容易地设计异步电路。

解决方案:异步电路设计工具包括一个转换器,该转换器具有用于将以异步电路设计语言编写的代码转换为标准HDL并包含最小原语的异步转换工具,该语言用于允许异步过程之间的通信。用标准HDL编写的代码,用于同步电路设计。可以使用商用仿真器对功能转换为标准HDL的功能进行验证,这些仿真器最初是为验证同步电路设计而开发的。

版权:(C)2009,日本特许厅&INPIT

著录项

  • 公开/公告号JP2009134739A

    专利类型

  • 公开/公告日2009-06-18

    原文格式PDF

  • 申请/专利权人 SEIKO EPSON CORP;

    申请/专利号JP20090007444

  • 发明设计人 KARAKI NOBUO;LEE TAK KWAN;

    申请日2009-01-16

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-21 19:45:02

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