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ON-CHIP FAILURE INFORMATION ANALYZING APPARATUS AND ON-CHIP FAILURE INFORMATION ANALYZING METHOD

机译:芯片故障信息分析装置及芯片故障信息分析方法

摘要

PROBLEM TO BE SOLVED: To reduce test time for repair analysis of a memory device or on-chip analysis of failure diagnosis without increasing a hardware scale.;SOLUTION: An on-chip failure information analysis circuit 100 comprises a memory device 102A in which data is stored, a built-in self test unit 101 which drives the memory device 102A, a failure detection unit 102B for detecting a failure of memory output of the memory device 102A, a failure information storage unit 103B for storing the failure information including a location of the failure, an failure information analysis unit 103A which performs failure analysis using the number of failures detected by the failure detection unit 102B and the location of the failure to write the failure information including the analysis result in the failure information storage unit 103b, and an analysis result output unit 103C which outputs the analysis result of the failure information analysis unit 103A.;COPYRIGHT: (C)2009,JPO&INPIT
机译:要解决的问题:在不增加硬件规模的情况下,减少用于存储设备的维修分析或故障诊断的片上分析的测试时间。解决方案:片上故障信息分析电路100包括其中存储有数据的存储设备102A。存储有驱动存储设备102A的内置自检单元101,用于检测存储设备102A的存储输出的故障的故障检测单元102B,用于存储包括位置的故障信息的故障信息存储单元103B。关于故障,故障信息分析单元103A使用故障检测单元102B检测到的故障数量和故障位置进行故障分析,以将包括分析结果的故障信息写入故障信息存储单元103b,以及分析结果输出单元103C,其输出故障信息分析单元103A的分析结果。;版权:(C)2009,JPO&INPIT

著录项

  • 公开/公告号JP2009163790A

    专利类型

  • 公开/公告日2009-07-23

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP20070339885

  • 发明设计人 YASUKURA KENICHI;TOKUNAGA CHIKAKO;

    申请日2007-12-28

  • 分类号G11C29/12;G11C29/44;

  • 国家 JP

  • 入库时间 2022-08-21 19:45:02

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