首页> 外国专利> EARLY WRITE WITH DATA MASKING TECHNIQUE FOR INTEGRATED CIRCUIT DYNAMIC RANDOM ACCESS MEMORY (DRAM) DEVICES AND THOSE INCORPORATING EMBEDDED DRAM

EARLY WRITE WITH DATA MASKING TECHNIQUE FOR INTEGRATED CIRCUIT DYNAMIC RANDOM ACCESS MEMORY (DRAM) DEVICES AND THOSE INCORPORATING EMBEDDED DRAM

机译:用于集成电路动态随机访问内存(DRAM)设备和集成了嵌入式DRAM的数据写入技术的早期写入

摘要

PROBLEM TO BE SOLVED: To provide data early write with a data masking technique for dynamic random access memory (DRAM) devices and those incorporating embedded DRAM.;SOLUTION: A complementary data line, a complementary bit line, and a memory cell connected to the complementary bit line are provided. During early writing for achieving a high speed writing operation in the memory cell, the complementary data line pair is kept at an intermediate potential when data masking is carried out. Thus, early writes to DRAM arrays with direct bit, byte or word data masking capability are enabled.;COPYRIGHT: (C)2009,JPO&INPIT
机译:解决的问题:为数据早期写入提供动态屏蔽存储器(DRAM)器件和包含嵌入式DRAM的器件的数据屏蔽技术;解决方案:互补数据线,互补位线和与之连接的存储单元提供互补位线。在用于在存储单元中实现高速写入操作的早期写入期间,当执行数据屏蔽时,互补数据线对保持在中间电位。因此,可以对具有直接位,字节或字数据屏蔽功能的DRAM阵列进行早期写入。;版权所有:(C)2009,JPO&INPIT

著录项

  • 公开/公告号JP2009070536A

    专利类型

  • 公开/公告日2009-04-02

    原文格式PDF

  • 申请/专利权人 UNITED MEMORIES INC;SONY CORP;

    申请/专利号JP20070274362

  • 发明设计人 PARRIS MICHAEL C;KIM C HARDEE;

    申请日2007-10-22

  • 分类号G11C11/401;

  • 国家 JP

  • 入库时间 2022-08-21 19:43:06

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