Asynchronous input data path technique for increasing speed and reducing latency in integrated circuit devices incorporating dynamic random access memory (DRAM) arrays and embedded DRAM

摘要

A non-clocked data-in path in an integrated circuit device incorporating a random access memory array allows data written to the array to ripple through to all banks all the way up to the local write circuitry. This allows for the fastest writes possible to the array since there are no additional clocking registers to slow down the data flow.