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Being device simulation manner of the polycrystal semiconductor devices, design manner of the polycrystal semiconductor devices and device simulation manner of the polycrystal

机译:作为多晶半导体器件的器件仿真方式,多晶半导体器件的设计方式和多晶器件仿真的方式

摘要

PROBLEM TO BE SOLVED: To obtain a polycrystalline semiconductor element of an optimized structure in a semiconductor element using a polycrystalline semiconductor as an active layer.;SOLUTION: In a polycrystalline silicon thin film transistor whose carrier transport mechanism at a grain boundary is dominant over transistor characteristics, the flow density of carriers that pass through the grain boundary in the active layer is calculated considering scattering effects of free carriers in the grain boundary, and on the basis of the result, a parameter which is dominant over device characteristics is determined. Preferably, Thermionic Emission effects are taken into consideration.;COPYRIGHT: (C)2003,JPO
机译:解决的问题:在使用多晶半导体作为有源层的半导体元件中获得具有优化结构的多晶半导体元件;解决方案:在多晶硅薄膜晶体管中,其晶界处的载流子传输机制比晶体管占主导地位考虑到自由载流子在晶界中的散射效应,计算出在特性方面的,通过有源层中的晶界的载流子的流动密度,并基于该结果,确定对器件特性起主导作用的参数。优选地,考虑到热电子发射效应。;版权所有:(C)2003,JPO

著录项

  • 公开/公告号JP4281103B2

    专利类型

  • 公开/公告日2009-06-17

    原文格式PDF

  • 申请/专利权人 セイコーエプソン株式会社;

    申请/专利号JP20010305748

  • 发明设计人 木村 睦;

    申请日2001-10-01

  • 分类号H01L29/786;H01L29/00;

  • 国家 JP

  • 入库时间 2022-08-21 19:40:14

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