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Operational amplifier circuit and offset correction circuit

机译:运算放大器电路和失调校正电路

摘要

PPROBLEM TO BE SOLVED: To provide an offset correction circuit capable of absorbing variation of offsets with a small circuit scale without the need of frequent refreshing, therby performing an offset correction. PSOLUTION: In an operational amplifier circuit 1, a switch element S1 is closed and a switch element S2 is opened. A latch circuit DL latches an output voltage of the operational amplifier 1a, performs a Q output corresponding to the latched output voltage, and a control circuit 2a inputs a signal s1 for offset correction to an offset adjustment input terminal OR of the operational amplifier 1a. The latch circuit DL further latches the output voltage subjected to offset correction by the operational amplifier 1a, and the signal s1 for offset correction is applied to fine adjustment in order to correct the remaining offset. Thus, the offset of the output voltage of the operational amplifier 1a is quantized by a correction amount weighted in accordance with what number time of the latch at that time, and the quantized offset is stored as a binary logical signal in the control circuit 2a. PCOPYRIGHT: (C)2007,JPO&INPIT
机译:

要解决的问题:提供一种偏移校正电路,该偏移校正电路能够以较小的电路规模吸收偏移的变化而无需频繁刷新,从而执行偏移校正。

解决方案:在运算放大器电路1中,开关元件S1闭合,开关元件S2打开。锁存电路DL锁存运算放大器1a的输出电压,执行与锁存的输出电压相对应的Q输出,并且控制电路2a将用于偏移校正的信号s1输入到运算放大器1a的偏移调整输入端子OR。锁存电路DL进一步锁存由运算放大器1a进行了偏移校正的输出电压,并且将用于偏移校正的信号s1施加到微调以校正剩余的偏移。因此,运算放大器1a的输出电压的偏移通过根据当时的锁存器的次数来加权的校正量来量化,并且该量化的偏移作为二进制逻辑信号存储在控制电路2a中。

版权:(C)2007,日本特许厅&INPIT

著录项

  • 公开/公告号JP4246177B2

    专利类型

  • 公开/公告日2009-04-02

    原文格式PDF

  • 申请/专利权人 シャープ株式会社;

    申请/专利号JP20050133212

  • 发明设计人 中尾 友昭;

    申请日2005-04-28

  • 分类号H03K5/08;H03F3/34;H03M1/66;

  • 国家 JP

  • 入库时间 2022-08-21 19:38:15

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