HARDWARE IMPLEMENTATION OF A PROGRAMMABLE FFT BASED ON A HALF LENGTH FFT CORE

摘要

A method of designing a IEEE 802.11n modem starting from a IEEE 802.11a/g modem using a programmable FFT (Fast Fourier Transform) based on a half length FFT core, modifies data in a reception chain implemented in a IEEE 802.11n standard application. The method uses a N/2 FFT which is validated, along with a wrapper; and, extends and applies the validated N/2 FFT, (e.g., 64 FFT) to a N FFT (e.g., 128 FFT) by splitting the N FFT into two smaller first and second FFTs. The first FFT is applied to selected data samples (e.g., even samples) from the N FFT and the second FFT is applied to remaining data samples (e.g., odd samples) from the N FFT to complete data-handling, wherein the extending step is based on Danielson-Lanzos formula using a reduced number of Cordics. The method is also suitable for IFFT computations in IEEE 802.11n MIMO OFDM modem designs.