Viterbi decoder architecture for use in software-defined radio systems

摘要

A reconfigurable Viterbi decoder comprising a reconfigurable data path and a programmable finite state machine that controls the reconfigurable data path. The reconfigurable data path comprises a plurality of reconfigurable functional blocks including: i) a reconfigurable branch metric calculation block; and ii) a reconfigurable add-compare-select and path metric calculation block. The programmable finite state machine executes a plurality of context-related instructions associated with the reconfigurable Viterbi decoder.