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Prefetching exception vectors by early lookup exception vectors within a cache memory

机译:通过缓存中的早期查找异常向量来预取异常向量

摘要

An integrated circuit processor core 4 is provided with an instruction pipeline 20 along which program instructions advance. When an exception condition occurs part way through execution of a particular program instruction, then a prefetch of the exception handling program instruction corresponding to that exception is initiated before the currently executing program instruction has completed. In this way the exception handling program instruction is more rapidly available to start the exception processing. The early prefetch may involve performing a lookup in a cache memory 6 and any necessary linefill upon a miss. In addition, the exception handling program instruction amy also be fed into the instruction pipeline 20 before an instruction boundary is reached.
机译:集成电路处理器内核 4 具有指令管线 20 ,程序指令沿着该指令管线前进。当异常条件在执行特定程序指令的过程中部分发生时,则在当前执行的程序指令完成之前启动与该异常对应的异常处理程序指令的预取。这样,异常处理程序指令可以更快地用于启动异常处理。早期的预取可能涉及在缓存 6 中执行查找,并在未命中时进行任何必要的换行。另外,在到达指令边界之前,异常处理程序指令amy也被馈送到指令流水线 20 中。

著录项

  • 公开/公告号US7613911B2

    专利类型

  • 公开/公告日2009-11-03

    原文格式PDF

  • 申请/专利权人 ANDREW BURDASS;

    申请/专利号US20040798890

  • 发明设计人 ANDREW BURDASS;

    申请日2004-03-12

  • 分类号G06F7/38;G06F9/00;G06F9/44;G06F15/00;

  • 国家 US

  • 入库时间 2022-08-21 19:30:52

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