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Voltage level shifting circuit, a differential input stage circuit, and a method for providing a level shifted differential signal to a differential input buffer circuit

机译:电压电平移位电路,差分输入级电路以及将电平移位的差分信号提供给差分输入缓冲电路的方法

摘要

A voltage level shifting circuit (5) for shifting the common mode voltage of a differential signal to be within the working range of a differential input buffer circuit (3) comprises a first resistive voltage divider circuit (18) coupled between a first input terminal (10) and a voltage reference terminal (15) for receiving a voltage reference to which the common mode voltage of the level shifted differential signal is to be referenced, and a second resistive voltage divider circuit (18) coupled between a second input terminal (11) and the voltage reference terminal (15). The differential signal is applied to the first and second terminals (10,11), and the level shifted differential signal is produced on first and second output taps (17,19) of the first and second resistive voltage divider circuits (16,18) with the common mode of the level shifted differential signal referenced to the voltage reference applied to the voltage reference terminal (15). First and second high frequency low impedance circuits (22,23) couple the first and second input terminals (10,11) to the first and second output taps (17,19) to provide respective direct current blocked high frequency low impedance paths for the differential signal to first and second differential inputs (7,8) of the differential input buffer circuit (3) for minimizing propagation delays resulting from low pass filters created by the interaction of the first and second resistive voltage divider circuits (16,18) with first and second intrinsic input capacitance (Cb1,Cb2) coupling the first and second differential inputs (7,8) of the differential input buffer circuit (3) to ground.
机译:用于将差分信号的共模电压移位到差分输入缓冲电路( 3 )的工作范围内的电压电平移位电路( 5 )包括第一电阻分压器电路( 18 )耦合在第一输入端子( 10 )和参考电压端子( 15 )之间,用于接收参考电压电平偏移差分信号的共模电压将参考该参考电压,第二电阻分压器电路( 18 )耦合在第二输入端子( 11 )之间和参考电压端子( 15 )。差分信号被施加到第一和第二端子( 10,11 ),并且在第一和第二输出抽头( 17,19 )上产生电平移动的差分信号第一和第二电阻分压器电路( 16,18 )的共模电平偏移差分信号参考施加到电压参考端子( 15 )。第一和第二高频低阻抗电路( 22,23 )将第一和第二输入端子( 10,11 )耦合到第一和第二输出抽头( 17,19 ),以为差动信号提供各自的直流阻断高频低阻抗路径,以到达差动输入缓冲电路(的第一和第二差动输入( 7,8 ) > 3 ),以最小化由第一和第二电阻分压器电路( 16,18 )与第一和第二固有输入电容(C)相互作用而产生的低通滤波器导致的传播延迟 b1 ,C b2 )耦合差分输入缓冲电路( 3 <的第一和第二差分输入( 7,8 ) / B>)接地。

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