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Offset adjusting circuit and operational amplifier circuit

机译:失调调节电路和运算放大器电路

摘要

The present invention provides an offset adjusting circuit and an operational amplifier circuit. In the operational amplifier circuit (1), a switching element (S1) is closed and a switching element (S2) is opened. The latch circuit DL latches an output voltage of an operational amplifier (1a), and output a Q-output in accordance with the output voltage. The control circuit (2a) inputs an offset adjustment signal s1 to an offset adjustment input terminal OR of the operational amplifier (1a). Then, the latch circuit DL latches the output voltage having been subjected to the offset adjustment, and the offset adjustment signal s1 is finely adjusted for adjusting the remaining offset. In this way, the offset in the output voltage of the operational amplifier (1a) is quantized in accordance with the number of times the latching operation has been performed, and is stored in the control circuit (2a) in the form of a binary logical signal.
机译:本发明提供了一种偏移调整电路和运算放大器电路。在运算放大器电路( 1 )中,开关元件(S 1 )闭合,而开关元件(S 2 )断开。锁存电路DL锁存运算放大器的输出电压( 1 a ),并根据输出电压输出Q输出。控制电路( 2 a )将偏移调整信号s 1 输入到运算放大器( 1 a )。然后,锁存电路DL锁存已经进行偏移调整的输出电压,并且微调偏移调整信号s 1 以调整剩余偏移。这样,根据执行锁存操作的次数来量化运算放大器的输出电压( 1 a )的偏移,并且以二进制逻辑信号的形式存储在控制电路( 2 a )中。

著录项

  • 公开/公告号US7459966B2

    专利类型

  • 公开/公告日2008-12-02

    原文格式PDF

  • 申请/专利权人 TOMOAKI NAKAO;

    申请/专利号US20060411106

  • 发明设计人 TOMOAKI NAKAO;

    申请日2006-04-26

  • 分类号H03F1/02;

  • 国家 US

  • 入库时间 2022-08-21 19:28:53

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