MIXER CIRCUIT WITH IMAGE FREQUENCY REJECTION WHICH IS INTENDED, IN PARTICULAR, FOR AN RF RECEIVER WITH ZERO OR LOW INTERMEDIATE FREQUENCY

摘要

The present invention is a mixer circuit with image frequency rejection, in particular, it relates to a high frequency receiver in a zero intermediate frequency or low intermediate frequency. Features of the invention are of two outputs for delivering two signals at one input and a quadrature-phase that are connected to the input of the mixer circuit (F _1), respectively, the two outputs are the two simple mixers (31, respectively, 32; 31 ', 32' quadrature phase divider (30, 30 input to) "in the mixer circuit comprising a), having a frequency division ratio, the two simple mixers (31, 32; 31 'of, 32') including two input and a quadrature phase and frequency divider (33, 33 ') having a first output for transmitting a first output signal (F ₀₎ of the circuit it applied to the input of the simple mixers, respectively connected to the output to provide a mixer circuit with image frequency rejection of the feature. ; A mixer circuit, a quadrature phase and frequency divider, the high-frequency receiver, GSM, DCS 1800