LOGIC SIMULATOR, LOGIC CIRCUIT VERIFICATION METHOD, AND LOGIC CIRCUIT VERIFICATION PROGRAM

摘要

PROBLEM TO BE SOLVED: To perform efficient logic simulation.;SOLUTION: The logic simulator randomly generates a test scenario for verifying a logic circuit having a plurality of pins, generates stimuli of a plurality of transaction levels based on the test scenario, converts the stimulus of each transaction level to a stimulus of each pin level which can be input to the logic circuit, monitors pin operation of the logic circuit based on the stimulus of each pin level, stores the pin operation of the logic circuit according to instructions from a monitoring part within a simulation time designated to a logic simulation for the logic circuit in time series, terminates, upon detection of error in the pin operation of the logic circuit, the logic simulation for the logic circuit based on the test scenario in which the error of pin operation of the logic circuit occurs, and starts logic simulation for the logic circuit based on the other test scenario.;COPYRIGHT: (C)2010,JPO&INPIT