THROUGH-HOLE LAYOUT APPARATUS, AND THROUGH-HOLE LAYOUT METHOD

摘要

PPROBLEM TO BE SOLVED: To reduce the difference among values of layout density of through-holes on a semiconductor integrated circuit. PSOLUTION: This through-hole layout apparatus includes: an extraction part extracting existing through-holes connecting upper-layer wiring to lower-layer wiring from design data of the semiconductor integrated circuit; a calculation part calculating a layout density in a predetermined range around each of through-holes extracted by the extraction part, for the each through-holes; a selection part selecting, as target through-holes, the through-holes each having the layout density calculated by the calculation part smaller than a predetermined value, from among the through-holes extracted by the extraction part; and an additional layout part determining predetermined positions in the predetermined range centering the target through-holes as additional layout positions of through-holes, and additionally arranging the through-holes at additional layout positions on design data. PCOPYRIGHT: (C)2010,JPO&INPIT