DESIGN METHOD OF THREE-DIMENSIONAL INTEGRATED CIRCUIT, AND DESIGN PROGRAM OF THREE-DIMENSIONAL INTEGRATED CIRCUIT

摘要

PPROBLEM TO BE SOLVED: To reduce the number of wires exceeding 100 m in a wire length without much increasing the number of laminated layers, and to improve circuit performance. PSOLUTION: In a design method of a three-dimensional integrated circuit, an integrated circuit is disposed in a temporary layout region on an XP plane short in an X direction and long in a Y direction (S1), and then, the temporary layout region is divided into 2N or more small regions in the Y direction and one block is constructed for every N small areas (S2), and respective blocks are folded in the Y direction per small region to laminate N layers of integrated circuits so that the kN-th and kn+1th small regions are in a top layer or a bottom layer. PCOPYRIGHT: (C)2010,JPO&INPIT