LINEAR PIPELINED PROCESSING ARRAY FOR PROCESSOR ELEMENT FOR PERFORMING MATRIX CALCULATIONPIPELINED LINEAR ARRAY OF PROCESSOR ELEMENT FOR PERFORMING MATRIX COMPUTATION

摘要

PROBLEM TO BE SOLVED: To provide an efficient processor element architecture, which is suitable to execute matrix-related operations.;SOLUTION: The linear array includes a head processor element and a set of regular processor elements, the head processor element being interconnected with nearest neighbor processor elements in the array and having a feedback path from a non-neighbor regular processor element back to the head processor element. Each processor element includes an arithmetic circuit for performing multiplication, combining and accumulating operations, and a register file. The head processor element, further, includes a non-linear function generator. Each processor element is pipelined, such that the latency for an arithmetic operation to complete is a multiple of the period, with which new operations can be initiated. A very large instruction word (VLIW) program or other type of program can be used to control the array.;COPYRIGHT: (C)2010,JPO&INPIT