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Fast and processor efficient parallel matrix multiplication algorithms on a linear array with a reconfigurable pipelined bus system

机译：具有可重新配置的流水线总线系统的线性阵列上的快速且处理器有效的并行矩阵乘法算法

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Keqin Li; Senior Member; Yi Pan; Si Qing Zheng;
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年度 1998
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1. Fast and processor efficient parallel matrix multiplication algorithms on a linear array with a reconfigurable pipelined bus system [J] . Keqin Li, Yi Pan IEEE Transactions on Parallel and Distributed Systems . 1998,第8期

机译：具有可重配置流水线总线系统的线性阵列上的快速且处理器高效的并行矩阵乘法算法
2. An optimal and processor efficient parallel sorting algorithm on a linear array with a reconfigurable pipelined bus system [J] . Min He, Xiaolong Wu, Si Qing Zheng Computers and Electrical Engineering . 2009,第6期

机译：具有可重配置流水线总线系统的线性阵列的优化和处理器高效并行排序算法
3. Fast and Scalable Parallel Algorithms for Matrix Chain Product and Matrix Powers on Reconfigurable Pipelined Optical Buses [J] . KEQIN LI Journal of information science and engineering . 2002,第5期

机译：可重构流水线总线上矩阵链乘积和矩阵功率的快速可扩展并行算法
4. Parallel matrix multiplication on a linear array with a reconfigurable pipelined bus system [C] . Li, K., Pan, . 1999

机译：具有可重构流水线总线系统的线性阵列上的并行矩阵乘法
5. A pipelined array architecture for motion estimation in H.264/AVC and mapping multiple algorithms into a reconfigurable systolic array [D] . Jin, Wei 2008

机译：用于H.264 / AVC中的运动估计以及将多种算法映射到可重新配置的脉动阵列的流水线阵列架构
6. Fast 2D DOA Estimation Algorithm by an Array Manifold Matching Method with Parallel Linear Arrays [O] . Lisheng Yang, Sheng Liu, Dong Li, 2016

机译：并行线性阵列的流形匹配算法快速二维DOA估计算法
7. Parallel matrix multiplication on a linear array with a reconfigurable pipelined bus system [O] . Keqin Li, Victor Y. Pan 1999

机译：具有可重构流水线总线系统的线性阵列上的并行矩阵乘法
8. A fast adaptive convex hull algorithm on two-dimensional processor arrays with a reconfigurable BUS system [R] . Olariu, S., Schwing, J., Zhang, J. 1991

机译：具有可重构总线系统的二维处理器阵列的快速自适应凸包算法

Fast and processor efficient parallel matrix multiplication algorithms on a linear array with a reconfigurable pipelined bus system

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