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Opening the memory bus system null interval which uses

机译:打开内存总线系统空间隔使用

摘要

PROBLEM TO BE SOLVED: To solve a problem that signal wiring goes through a via hole and causes noise generation, since the signal wiring is carried out using the internal layer of a printed circuit board in a conventional technology.;SOLUTION: Signal wiring of a surface layer only which does not go through a via hole is realized by making spacing between conductors of bus wiring in adjacent two directional coupling elements and spacing between signaling terminals in connector equal, and using the directional coupling element with spacing of signalling terminal shorter than the spacing between signaling terminals of the connector. Consequently, noise generation can be reduced sharply, and a non-contact bus system of low noise can be provided.;COPYRIGHT: (C)2005,JPO&NCIPI
机译:解决的问题:由于信号布线是在传统技术中使用印刷电路板的内层进行的,因此解决了信号布线穿过通孔并产生噪声的问题。通过不使相邻的两个定向耦合元件中的总线配线的导体之间的间隔与连接器中的信号端子之间的间隔相等,并使用信号端子的间隔比导体端子的间隔短的定向耦合元件,来实现仅不通过通孔的表面层。连接器的信号端子之间的间距。因此,可以大大减少噪声的产生,并可以提供低噪声的非接触式总线系统。;版权所有:(C)2005,JPO&NCIPI

著录项

  • 公开/公告号JP4483198B2

    专利类型

  • 公开/公告日2010-06-16

    原文格式PDF

  • 申请/专利权人 株式会社日立製作所;

    申请/专利号JP20030110993

  • 发明设计人 佐藤 創;大坂 英樹;

    申请日2003-04-16

  • 分类号G06F13/16;

  • 国家 JP

  • 入库时间 2022-08-21 19:00:46

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