Clocked inverter circuit, a shift register, a scanning line driving circuit, the data line driving circuit, an electro-optical device and electronic equipment

摘要

PPROBLEM TO BE SOLVED: To provide a clocked inverter circuit preventing occurrence of punch-through data, contributing to low power consumption, and reducing the circuit scale, and also to provide a shift register, a scanning line drive circuit, a data line drive circuit, an electrooptic apparatus, and an electronic apparatus. PSOLUTION: The clocked inverter 11pn includes: an inverting circuit 20; a first circuit 21; and a second circuit 22. When the first and seconds 21, 22 are turned on, power is supplied to the inverting circuit 22, resulting in that the clocked inverter 11pn is active. The first circuit 21 is provided with: first and second transistors TR1, TR2 connected in series; and a delay circuit tdn. The second circuit 22 is provided with: fifth and sixth transistors TR5, TR6 connected in series; and a delay circuit tdp. The delay circuit tdn delays the leading edge of an inverted clock signal, and the delay circuit tdp delays the trailing edge of a clock signal. PCOPYRIGHT: (C)2006,JPO&NCIPI