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The schematic creation support device and circuit layout verification device

机译:原理图创建支持装置和电路布局验证装置

摘要

PROBLEM TO BE SOLVED: To significantly shorten work time to create or verify a circuit diagram and a layout diagram.;SOLUTION: A plurality of branch symbols V1 to V3 are plotted on a circuit diagram A as wiring elements between a node N1 and nodes N2 to N4, respectively. A design support apparatus 1 internally accepts the node N1 and nodes N2 to N4 as separate nodes disconnected by the branch symbols V1 to V3, so that a layout designer can easily design a layout by referring to the circuit diagram A.;COPYRIGHT: (C)2007,JPO&INPIT
机译:解决的问题:显着缩短创建或验证电路图和布局图的工作时间;解决方案:在电路图A上绘制了多个分支符号V1至V3作为节点N1和节点N2之间的布线元件至N4。设计支持设备1在内部将节点N1和节点N2至N4接受为由分支符号V1至V3断开的单独节点,以便布局设计者可以通过参考电路图A轻松地设计布局。 )2007,日本特许厅

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