首页> 外国专利> DATA TRANSFER CONTROL DEVICE, DATA TRANSFER DEVICE, DATA TRANSFER CONTROL METHOD, AND SEMICONDUCTOR INTEGRATED CIRCUIT USING RECONFIGURED CIRCUIT

DATA TRANSFER CONTROL DEVICE, DATA TRANSFER DEVICE, DATA TRANSFER CONTROL METHOD, AND SEMICONDUCTOR INTEGRATED CIRCUIT USING RECONFIGURED CIRCUIT

机译:使用重新配置的电路的数据传输控制设备,数据传输设备,数据传输控制方法和半导体集成电路

摘要

A semiconductor integrated circuit ensures to reserve a required memory bandwidth at low cost. A memory bandwidth monitoring unit 1210 calculates a required memory bandwidth, monitors the usage condition of the memory, and outputs the following information to a reconfiguration control unit 1120. The information is necessary to reconfigure a reconfiguration unit 1110 into a logic unit and a temporary buffer both of which are scalable depending on the usage condition. According to information, the reconfiguration control unit 1120 controls the reconfiguration unit 1110. The buffer is for storing data accessed to or from the memory by each bus master. The logic unit acts as a bus master that only uses a portion of the memory bandwidth that remains unused during the time no access request to the data storage unit 1002 issued by a bus master unit having a higher priority level is being executed.
机译:半导体集成电路确保以低成本保留所需的存储器带宽。存储器带宽监视单元 1210 计算所需的存储器带宽,监视存储器的使用状况,并将以下信息输出到重新配置控制单元<​​B> 1120 。该信息是将重新配置单元 1110 重新配置为逻辑单元和临时缓冲区所必需的,这两个逻辑单元和临时缓冲区都可以根据使用条件进行扩展。根据该信息,重配置控制单元<​​B> 1120 控制重配置单元 1110。缓冲区用于存储每个总线主设备从存储器访问或从存储器访问的数据。逻辑单元充当总线主控器,该总线主控器仅使用在优先级较高的总线主控单元发出的对数据存储单元 1002 的无访问请求期间未使用的一部分内存带宽正在执行。

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