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Apparatus of low power, area efficient FinFET circuits and method for implementing the same
Apparatus of low power, area efficient FinFET circuits and method for implementing the same
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机译:低功率,面积有效的FinFET电路的装置及其实现方法
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摘要
A novel implementation of a majority gate and a 2-1 MUX by using both gates of FinFET transistors as inputs is presented. A general methodology of using both gates of FinFET as inputs to implement any digital logic circuit is also presented. Circuits implemented using this methodology have significant advantages over CMOS logic counterpart and pass transistor logic counterpart in terms of power consumption and cell area.
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