首页> 外国专利> Circuit designing program and circuit designing system having function of test point insertion

Circuit designing program and circuit designing system having function of test point insertion

机译:具有测试点插入功能的电路设计程序及电路设计系统

摘要

A circuit design program product to cause a computer to execute a circuit design process based on a test point insertion, includes: a step for making reference to a netlist to extract a plurality of equivalent faults fj; a step for searching a number n(fj) of test point required for a number of the equivalent fault keeping equivalent relation with a search object equivalent fault fj with each of a plurality of equivalent faults as the search object equivalent fault to become a predetermined number and a insertion position G(fj); a step for calculating probability p(fj) of a single stuck-at fault being included in a set of equivalent faults including at least a search object equivalent fault fj at an occasion when the relevant stuck-at fault takes place in the circuit; a step for calculating a parameter e(fj) derived by an equation: e(fj)=p(fj)/n(fj) on each pattern of an insertion position G(fj); and a step for determining the insertion position G(fmax) giving the maximum value among the calculated parameters e(fj) as a position where the test point is inserted.
机译:一种使计算机基于测试点插入执行电路设计过程的电路设计程序产品,包括:参考网表以提取多个等效故障f j 的步骤;搜索多个等价故障所需的测试点数n(f j )的步骤,该等价故障与搜索对象等效故障f j 中的每一个保持等效关系作为搜索对象等效故障的多个等效故障成为预定数量和插入位置G(f j );计算单个卡在故障的概率p(f j )被包括在至少包括搜索对象等效故障f j at的一组等效故障中的步骤电路中发生相关的卡死故障的情况;计算由等式得出的参数e(f j )的步骤:e(f j )= p(f j )/ n (f j )插入位置G(f j )的每个模式上;确定插入位置G(f max )的步骤,该插入位置G(f max )将计算出的参数e(f j )中的最大值作为测试点的插入位置。

著录项

  • 公开/公告号US7703056B2

    专利类型

  • 公开/公告日2010-04-20

    原文格式PDF

  • 申请/专利权人 JUNPEI NONAKA;

    申请/专利号US20070907714

  • 发明设计人 JUNPEI NONAKA;

    申请日2007-10-16

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 18:49:20

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号