首页> 外国专利> Atomic layer deposition in the formation of gate structures for III-V semiconductor

Atomic layer deposition in the formation of gate structures for III-V semiconductor

机译:III-V半导体栅极结构形成过程中的原子层沉积

摘要

A semiconductor structure and method wherein a recess is disposed in a surface portion of a semiconductor structure and a dielectric film is disposed on and in contract with the semiconductor. The dielectric film has an aperture therein. Portions of the dielectric film are disposed adjacent to the aperture and overhang underlying portions of the recess. An electric contact has first portions thereof disposed on said adjacent portions of the dielectric film, second portions disposed on said underlying portions of the recess, with portions of the dielectric film being disposed between said first portion of the electric contact and the second portions of the electric contact, and third portions of the electric contact being disposed on and in contact with a bottom portion of the recess in the semiconductor structure. The electric contact is formed by atomic layer deposition of an electrically conductive material over the dielectric film and through the aperture in such dielectric film.
机译:一种半导体结构和方法,其中在半导体结构的表面部分中设置凹部,并且在半导体上并与半导体收缩地设置介电膜。介电膜在其中具有孔。介电膜的部分设置成与孔相邻,并悬于凹部的下面的部分。电触头的第一部分设置在电介质膜的所述相邻部分上,第二部分设置在凹部的所述下伏部分上,电介质膜的部分设置在电触头的所述第一部分与电触头的第二部分之间。电接触,并且电接触的第三部分设置在半导体结构中的凹部的底部上并与之接触。电接触是通过在介电膜上并穿过该介电膜中的孔的导电材料的原子层沉积而形成的。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号