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DUAL-MODULUS PRESCALER CIRCUIT OPERATING AT A VERY HIGH FREQUENCY

机译:双模分频器电路以非常高的频率运行

摘要

ABSTRACT DUAL-MODULUS PRESCALER CIRCUIT OPERATING AT A VERY HIGH FREQUENCY The dual-modulus prescaler circutt (1) is devised to operate at a very high frequency. This circuit includes an assembly formed of two dynamic D-type flip flops (12, 13), and two NAND logic gates (15, 16) arranged in negative feedback between the two flip flops. The two flip flops are clocked by an input clock signal (CK) to supply a divided output signal (OUT) whose frequency matches the input clock frequency divided by 2 or by 3 as a function of a division mode selection signal (divb) applied to the input of the first NAND logic gate (15). One non-inverted output of the second flip flop is connected to one input of the first tllp flop (12). The first dynamic flip flop includes three active branches and supplies a single inverted output signal. A third flip flop (14) with three active branches receives an inverted mode selection signal (div) at input in order to supply the mode selection signal to the inverted output thereof, clocked by the non-inverted output signal of the second flip flop. Figure 2
机译:极高频率的抽象双模预分频器电路双模预分频器电路(1)设计为以很高的频率工作。该电路包括由两个动态D型触发器(12、13)以及以负反馈布置在两个触发器之间的两个NAND逻辑门(15、16)形成的组件。这两个触发器由一个输入时钟信号(CK)计时,以提供一个分频输出信号(OUT),该分频输出信号的频率与输入时钟频率相除后的2或3分频,该频率取决于施加到分频模式选择信号(divb)第一与非逻辑门(15)的输入。第二触发器的一个非反相输出连接到第一tllp触发器(12)的一个输入。第一动态触发器包括三个有源分支,并提供单个反相输出信号。具有三个有效分支的第三触发器(14)在输入端接收反相模式选择信号(div),以便将模式选择信号提供给其反相输出,该模式选择信号由第二触发器的非反相输出信号提供时钟。图2

著录项

  • 公开/公告号IN2008CH03110A

    专利类型

  • 公开/公告日2010-06-25

    原文格式PDF

  • 申请/专利权人

    申请/专利号IN3110/CHE/2008

  • 申请日2008-12-11

  • 分类号H03K21/00;

  • 国家 IN

  • 入库时间 2022-08-21 18:46:24

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