The simulation of worst-case operating conditions for integrated circuits operating in a total dose environment.

摘要

The degradations in the circuit performance created by the radiation exposure of integrated circuits are so unique and abnormal that thorough simulation and testing of VLSI circuits is almost impossible and new ways to estimate the operating performance in a radiation environment must be developed. The principal goal of the work presented herein has been the development of simulation techniques for radiation effects on semiconductor devices. The mixed-mode simulation approach has shown to be the most promising. The switch-level approach is used to identify the failure mechanisms and critical sub-circuits responsible for operational failure along with worst-case operating conditions during and after irradiation. For precise simulations of critical sub-circuits SPICE is used. The identification of failure mechanisms enables the circuit designer to improve the circuit's performance and failure exposure level. Identification of worst-case operating conditions during and after irradiation reduces the complexity of testing VLSI circuits for radiation environments. The results of test circuits for failure simulations using a conventional simulator and the new simulator showed significant time savings using the new simulator. The savings in simulation time proved to be circuit topology dependent. However, for large circuits, the simulation time proved to be orders of magnitude smaller than simulation time for conventional simulators.