首页>
外国专利>
ASYNCHRONOUS MULTI-BIT OTP MEMORY CELL AND AN ASYNCHRONOUS MULTI-BIT OTP MEMORY DEVICE, A PROGRAMMING METHOD AND A READ OUT METHOD OF THE SAME, CAPABLE OF REDUCING THE OCCUPANCY AREA OF A CELL ARRAY
ASYNCHRONOUS MULTI-BIT OTP MEMORY CELL AND AN ASYNCHRONOUS MULTI-BIT OTP MEMORY DEVICE, A PROGRAMMING METHOD AND A READ OUT METHOD OF THE SAME, CAPABLE OF REDUCING THE OCCUPANCY AREA OF A CELL ARRAY
PURPOSE: An asynchronous multi-bit OTP memory cell and an asynchronous multi-bit OTP memory device are provided to reduce the whole layout by storing n-bit of data in one OTP cell.;CONSTITUTION: An OTP memory cell array(410) comprises at least two asynchronous multi-bit OTP memory cells. A controller(420) generates mode control signals for controlling a program mode or a read mode. A power switch circuit(430) switches a first voltage to a second voltage or a third voltage. A row decoder(440) decodes a row address signal. A word line driving circuit(450) drives at least two program word lines and at least read word lines. A column decoder(460) decodes a column address signal. A source line driver circuit(470) drives a corresponding source line. The source line switch enable circuit(480) generates a source line switch enable signal.;COPYRIGHT KIPO 2010
展开▼