FUNCTIONAL INPUT STRUCTURE FOR PARALLEL-SERIAL MULTIPLIER OF POSITION-SIGN SYSTEM f(+/-) FORMAT

摘要

FIELD: physics; computer engineering.;SUBSTANCE: invention relates to computer engineering and can be used in designing arithmetic devices for carrying out arithmetic operations in position-sign codes. Each bit of the device is made in form of two structure-equivalent channels - positive and conditionally negative. In one version of implementation, the i^th bit of each channel contains two AND logic components and two NOR logic components.;EFFECT: faster operation of the device.;4 dwg