Multi-chip memory element i.e. dynamic RAM, has chip including group of code pads to impress individual identification i.e. binary code, for concerned chip by external engagement of group of code pads

摘要

The element (100) has a memory circuit integrated on a set of chips. The circuit has a set of addressable memory cells and control devices for adjusting operating conditions and writing and reading data bits in the cells. One side of each of pads is connected with associated nodes of the circuit and the other side is connected with associated outer contacts of the element for applying electric potentials to the nodes over the contacts. Each chip has a group of code pads (PG3) to impress individual identification i.e. binary code, for the concerned chip by external engagement of the pad group.