TIMING EXTRACTION CIRCUIT FOR OPTICAL RECEIVER USING 1/2 FREQUENCY CLOCK OF DATA TRANSMISSION RATE AND DUTY DEVIATION DEALING CIRCUIT FOR OPTICAL TRANSCEIVER

摘要

PROBLEM TO BE SOLVED: To provide an enhanced timing extraction circuit for an optical receiver using a 1/2 frequency clock of a data transmission rate and a duty deviation dealing circuit for an optical transceiver.;SOLUTION: The timing extraction circuit has a detection circuit and a control circuit. The detection circuit detects elimination of phase comparison information output from a phase comparator circuit, which performs phase comparison between a data signal of a bit rate B (bit/s) and a clock signal of B/2(Hz) in an interval of 2/B(sec), by receiving a data signal of a predetermined pattern while using a PLL circuit including the phase comparator circuit. The control circuit controls the phase of the clock signal in order to maintain synchronism in accordance with the detection. Further, a duty deviation dealing circuit controls data identification phases before and after a point of synchronization of the PLL circuit based on a result of duty determination between input data before and after the point.;COPYRIGHT: (C)2011,JPO&INPIT