TEST DEVICE AND TEST METHOD FOR RESISTIVE RANDOM ACCESS MEMORY, AND RESISTIVE RANDOM ACCESS MEMORY DEVICE

摘要

PPROBLEM TO BE SOLVED: To locally and freely adjust cycle time in an arbitrary test cycle. PSOLUTION: A first write enable signal that changes with a constant period and a second write enable signal that changes at a time portion in which limit time between activation/deactivation control of word lines and activation/deactivation control of bit lines is checked are input. A plurality of core control signals in which a time interval with which the core control signals change is locally shorter than a period of the first write enable signal are generated based on the first write enable signal and the second write enable signal that are input. An operation verification of a resistive random access memory is performed by using the generated core control signals. PCOPYRIGHT: (C)2011,JPO&INPIT