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The digital phase synchronous loop (DPLL) the time anti- digital transmitter (TDC) the system and method in order to calibrate the power on gating window
The digital phase synchronous loop (DPLL) the time anti- digital transmitter (TDC) the system and method in order to calibrate the power on gating window
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机译:数字相位同步环路(DPLL)时间反数字发射机(TDC)的系统和方法,以校准门窗上的功率
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摘要
Although the digital phase synchronous loop (DPLL) the time anti- digital transmitter (TDC) the power on gating window is calibrated, the system and the method of being related are disclosed. The gating window while operating TDC simultaneously with efficient method of electric power, is calibrated in order to guarantee the appropriate operation of DPLL. Especially, the technology sets width of the TDC gating window to established value; Until the control loop is locked substantially, operate DPLL; While monitoring the phase error signal which is formed by the phase error device of DPLL, just the specified quantity makes the width of the TDC gating window decrease; When phase error arrives substantially in specified threshold, or crossing decide the present width of the TDC gating window; And just the specified quantity which is installed in the margin of error of operational width of the TDC gating window requires the fact that it increases the present width of the TDC gating window.
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