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Multi signal switch circuits, electric current switch cell circuit and latched circuit, electric current addition type DAC, and semiconductor integrated circuit, image equipment and communication equipment

机译:多信号开关电路,电流开关单元电路和锁存电路,电流相加型DAC以及半导体集成电路,图像设备和通信设备

摘要

4 input latched circuits 3b are arranged four input signals in the multi signal switch circuits which use IN1 - IN4. These 4 input latched circuits 3b are formed, the signal the inside one of IN1 of the aforementioned four - IN4 L , three taking H when, four NAND circuits 6 ' 'with. Each NAND circuit 6' 'with, as for the output, each, the input signal it is connected by one inside IN1 of the aforementioned four - IN4, it inputs three signals where other than of the signal which is connected to that output remains. Therefore, regarding the multi signal switch circuits which have the input signal of three or more, timing error between the multi signals which it should output is prevented effectively.
机译:在使用IN1-IN4的多信号开关电路中,四个输入锁存电路3b布置有四个输入信号。形成这四个输入锁存电路3b,信号在前述四个IN4的IN1的内部之一-IN4L中,三个时取H,四个NAND电路6''相接。对于每个NAND电路6',对于输出,每个输入电路都通过上述四个IN1中的一个IN1连接至IN4,它输入三个信号,除连接至该输出的信号之外,其余三个信号都保留。因此,对于具有三个以上输入信号的多信号开关电路,可以有效地防止应输出的多信号之间的定时误差。

著录项

  • 公开/公告号JPWO2009133658A1

    专利类型

  • 公开/公告日2011-08-25

    原文格式PDF

  • 申请/专利权人 パナソニック株式会社;

    申请/专利号JP20100510022

  • 发明设计人 徳丸 美智子;生駒 平治;

    申请日2009-04-06

  • 分类号H03K5;H03M1/08;H03M1/74;H03K3/037;

  • 国家 JP

  • 入库时间 2022-08-21 18:17:51

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