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RESONANT CLOCK DISTRIBUTION NETWORK ARCHITECTURE FOR TRACKING PARAMETER VARIATIONS IN CONVENTIONAL CLOCK DISTRIBUTION NETWORKS
RESONANT CLOCK DISTRIBUTION NETWORK ARCHITECTURE FOR TRACKING PARAMETER VARIATIONS IN CONVENTIONAL CLOCK DISTRIBUTION NETWORKS
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机译:常规时钟分布网络中用于跟踪参数变化的谐振时钟分布网络体系结构
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摘要
A resonant clock distribution network architecture is proposed that enables a resonant clock network to track the impact of parameter variations on the insertion delay of a conventional clock distribution network, thus limiting clock skew between the two networks and yielding increased performance. Such a network is generally applicable to semiconductor devices with various clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs.
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