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Resonant clock distribution network architecture for tracking parameter variations in conventional clock distribution networks
Resonant clock distribution network architecture for tracking parameter variations in conventional clock distribution networks
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机译:谐振时钟分配网络体系结构,用于跟踪常规时钟分配网络中的参数变化
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摘要
A resonant clock distribution network architecture is proposed that enables a resonant clock network to track the impact of parameter variations on the insertion delay of a conventional clock distribution network, thus limiting clock skew between the two networks and yielding increased performance. Such a network is generally applicable to semiconductor devices with various clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs.
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