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INTEGRATED CIRCUIT DEVICES INCLUDING LOW-RESISTIVITY CONDUCTIVE PATTERNS IN RECESSED REGIONS
INTEGRATED CIRCUIT DEVICES INCLUDING LOW-RESISTIVITY CONDUCTIVE PATTERNS IN RECESSED REGIONS
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机译:包括地区在内的低电阻率导电型的集成电路设备
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摘要
An integrated circuit device includes a device isolation pattern on a semiconductor substrate to define an active area therein. The active area includes a doped region therein. A conductive pattern extends on the active area and electrically contacts the doped region. The conductive pattern has a lower resistivity than the doped region. The conductive pattern may be disposed in a recessed region having a bottom surface lower than a top surface of the active area. A channel pillar electrically contacts to the doped region and extends therefrom in a direction away from the substrate. A conductive gate electrode is disposed on a sidewall of the channel pillar, and a gate dielectric layer is disposed between the gate electrode and the sidewall of the channel pillar.
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