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High-Speed Standard Cells Designed Using a Deep-Submicron Physical Effect

机译:利用深亚微米物理效应设计的高速标准单元

摘要

A system comprises signal paths. There are first through n signal paths, n being a positive integer. A critical one of the first through n signal paths is based on being a respective one of the first through n signal paths having a slowest signal propagation and/or a path in which a signal propagates slower than a clock cycle. The critical one of the first through n signal paths comprises a first size of a standard cell including corresponding logic devices. The non-critical ones of the first through n signal paths comprise a second size of a standard cell including corresponding logic devices, the second size being smaller than the first size.
机译:系统包括信号路径。第一到第n条信号路径,n为正整数。第一至n个信号路径中的关键一条是基于第一至n个信号路径中的一条具有最慢的信号传播和/或其中一条信号的传播慢于时钟周期的路径。第一至n个信号路径中的关键路径包括标准单元的第一尺寸,该标准单元包括相应的逻辑器件。第一至n个信号路径中的非关键路径包括具有相应逻辑器件的标准单元的第二尺寸,该第二尺寸小于第一尺寸。

著录项

  • 公开/公告号US2011156749A1

    专利类型

  • 公开/公告日2011-06-30

    原文格式PDF

  • 申请/专利权人 PAUL PENZES;

    申请/专利号US20090651109

  • 发明设计人 PAUL PENZES;

    申请日2009-12-31

  • 分类号H03K19/003;H03K19;

  • 国家 US

  • 入库时间 2022-08-21 18:13:03

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