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High Voltage Switch Utilizing Low Voltage MOS Transistors with High Voltage Breakdown Isolation Junctions

机译:利用具有高压击穿隔离结的低压MOS晶体管的高压开关

摘要

A high voltage switch having first and second states includes an input receiving an input voltage that is greater than a supply voltage. Each of first, second, and third MOS structures of a first conductivity type has a gate, a source, and a drain. The sources and drains of each of the MOS structures are electrically coupled in series between the input and ground. An output is electrically coupled to the input. When the switch is in the first state, the gate of the first MOS structure is pulled to ground, the gate of the second MOS structure is pulled to the supply voltage, and the gate of the third MOS structure is pulled to a voltage greater than the supply voltage and less than the input voltage. When the switch is in the second state, the gates of all of the MOS structures are pulled to the supply voltage.
机译:具有第一状态和第二状态的高压开关包括输入,该输入接收大于电源电压的输入电压。第一导电类型的第一,第二和第三MOS结构中的每个具有栅极,源极和漏极。每个MOS结构的源极和漏极在输入和地之间串联电耦合。输出电耦合到输入。当开关处于第一状态时,第一MOS结构的栅极被拉至地,第二MOS结构的栅极被拉至电源电压,并且第三MOS结构的栅极被拉至大于电源电压小于输入电压。当开关处于第二状态时,所有MOS结构的栅极都被拉至电源电压。

著录项

  • 公开/公告号US2011057714A1

    专利类型

  • 公开/公告日2011-03-10

    原文格式PDF

  • 申请/专利权人 TACETTIN ISIK;

    申请/专利号US20090555259

  • 发明设计人 TACETTIN ISIK;

    申请日2009-09-08

  • 分类号H03K17/687;

  • 国家 US

  • 入库时间 2022-08-21 18:10:46

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