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Techniques for improving transistor-to-transistor stress uniformity
Techniques for improving transistor-to-transistor stress uniformity
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机译:改善晶体管至晶体管应力均匀性的技术
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摘要
An integrated circuit has a transistor with an active gate structure overlying an active diffusion area formed in a semiconductor substrate. A dummy gate structure is formed over a diffusion area and separated from the active gate structure by a selected distance (d2). A stress layer overlying the transistor array produces stress in a channel region of the transistor.
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