Circuit and method for controlling the secondary FET of transformer coupled synchronous rectified flyback converter

摘要

A secondary FET_sc control circuit is disclosed for controlling FET_sc of transformer coupled synchronous rectified flyback converter (TCSC). The control circuit includes source-drain voltage V_SD sense trigger with output V_SD-trigger activated upon positive 0-crossing of V_SD. Drain-source current I_DS sense trigger with output I_DS-trigger activated upon positive 0-crossing of I_DS. Secondary coil voltage Vsec sense trigger with output Vsec-trigger activated upon sensing negative Vsec. A multi-trigger gate driver (MTGD) has trigger inputs coupled to V_SD-trigger, I_DS-trigger, Vsec-trigger and drive output driving the FET_sc gate. The MTGD has logic states of state-I where FET_sc is turned off and latched, state-II where FET_sc is turned off but unlatched, state-III where FET_sc is turned on but unlatched. The MTGD is configured to enter state-III upon V_SD-trigger, enter state-I upon I_DS-trigger and enter state-IT upon Vsec-trigger. The control circuit thus avoids false triggering of the FET_sc by numerous undesirable Vsec ringings.