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METHOD FOR IMPLEMENTING TRUE-RANDOM NUMBER GENERATORS IN FPGA DEVICES

机译:在FPGA设备中实现真随机数生成器的方法

摘要

The invention relates to a method for implementing true-random number generators in FPGA (Field Programmable Gate Array) devices. The proposed method exploits a characteristic of digital electronic circuits named fan-out in order to obtain a non-determinist behaviour or, in other words, a source of entropy. In order to apply the claimed method there is used a generator comprising the following components : a driver block (1) which generates a periodical signal and controls the circuits of a load block (2), said circuits are in equal number with the fan-out of the driver block (1) and a post-processing block (3) which corrects the possible asymmetries in the flow of bits. The claimed method consists in generating, in a first step, by the driver block, a periodical signal whose frequency is equal to the frequency of the clock signal, followed, in a second step, by sampling with the same frequency of the output signal of the driver block, the sampling being carried out by the circuits of the load block, the results of the sampling being combined, in a third step, by applying an operation EXCLUSIVE-OR on a certain number of consecutive bits within the post-processing block.
机译:本发明涉及在FPGA(现场可编程门阵列)设备中实现真随机数发生器的方法。所提出的方法利用了称为扇出的数字电子电路的特性,以便获得不确定的行为,或者换句话说,获得了熵的来源。为了应用所要求保护的方法,使用了一种发电机,该发电机包括以下组件:驱动器块(1),该驱动器块生成周期性信号并控制负载块(2)的电路,所述电路与风扇的数量相等,在驱动程序块(1)和后处理块(3)中,后者校正了位流中可能的不对称性。所要求保护的方法包括:在第一步骤中,由驱动器模块生成频率等于时钟信号的频率的周期性信号,然后在第二步骤中,以相同频率的输出信号采样。驱动器模块,由负载模块的电路执行采样,在第三步中,通过对后处理模块中一定数量的连续位执行EXCLUSIVE-OR运算,组合采样结果。

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