Frame generator with multiplexer implemented on programmable FPGA devices for SDR applications,frame generation method and transmission system

摘要

A frame generator (10) in a programmable FPGA device for SDR applications is used for stranding at output in predetermined frames a plurality of incoming symbols. The generator (10) comprises a memory unit (12) whose memory cells each contain a code associated with a symbol of the plurality. A counter (11) addresses the memory cells sequentially to cause to emit to the memory (12) in sequence predetermined symbol codes to form a desired frame. A decoder (13) decodes the code at output from the memory (12) and commands a multiplexer (14) on the basis of the result of the decoding to start the incoming symbols (15) in sequence at output (16).